(1) Field of the Invention
This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically to the formation of trenches to isolate active device areas on a semiconductor substrate.
(2) Description of Related Art
As semiconductor integrated circuits progress toward greater micro-miniaturation active devices are packed into ever smaller areas and electrical isolation between active devices becomes an extremely important issue. Shallow trenches filled with insulating material have proven to be most desirable for isolating active devices. However, the trench isolation process still suffers from a problem of eroded insulating material at trench edges after conventional shallow trench isolation processing. This erosion of insulating material produces "divots" at the edges of the trench and results in abnormal device characteristics, such as the "double hump" in the I.sub.d vs V.sub.g I-V curve, and increased device leakage current. These characteristics are unacceptable for the production of high denisty DRAM. Therefore, a challenge in the industry is to provide a means of formation of planarized isolation trenches without the formation of "divots" at the edges of the trenches.
Numerous improvements to methods of forming planarized isolation trenches have been invented. For example, U.S. Pat. No. 5,433,794 entitled "Spacers Used To Form Isolation Trenches With Impoved Corners" granted Jul. 18, 1995 to Pierre C. Fazan et al describes a method of forming trench isolation in which the isolating material extends over the peripheral edge of the trench, thereby creating a small rounded cap over the trench.
Also, U.S. Pat. No. 5,441,094 entitled "Trench Planarization Techniques" granted Jul. 15, 1995 to Nicholas F. Pasch shocks a method of trench planarization where the trench extends above the surface of the substrate.
U.S. Pat. No. 5,540,811 entitled "Method Of Manufacturing Semiconductor Device" granted Jul. 30, 1996 to Shigeru Morita describes a polishing method for forming trench isolation in which a selectively placed stopper layer is formed on concave portions of the structure.
U.S. Pat. No. 5,275,965 entitled "Trench Isolation Using Gated Sidewalls" granted Jan. 4, 1994 to Monte Manning describes a method of forming trench isolation in which a thin oxide layer forms a gate within the isolation structure.